Topological Configuration

Variability modeling is at the heart of modern software product line engineering in order to describe configuration options and their inter-dependencies. While variability modeling traditionally focuses on hierarchical models, recent industrial case studies indicate that there is a need for more complex variability models.

One case of such more complex models are topological configurations. In [1], the authors describe topological configurations as interconnected structures, in general graphs. Examples of such configurations include the (logical) wiring of electronic components in embedded systems or the layout of alarm sensor systems in terms of displays, zones, rooms and sensors [1]. In addition to references among traditional features [2], for topological configurations the domain engineer also aims at limiting the valid configuration space, e.g., by constraints such as that backup sensor loops with the same sensors must exist [1]. Furthermore, the application engineer or domain user shall be enabled to configure such topologies in a convenient manner. However, according to [1] currently no product line approaches support topological configurations so that the authors characterized topological configurations in product line engineering as a current research challenge.

Our approach

Our approach to product line engineering encompasses capabilities for modeling and configuring topologies. Already in the FP7 project INDENICA, the industrial requirements for the variability modeling approach [3] requested such connected structures. The realizing variability modeling language IVML [4] provides typed references and the capability to model complex constraints using an extended dialect of the Object Constraint Language (OCL). The capabilities for modeling, configuring and instantiating such configurations are realized by our prototypical toolset EASy-Producer [5]. 

Big Data Analysis Pipelines as Topological Configuration

In the FP7 project QualiMaster, we extend and refine the capabilities of our approach to topological configuration to enable the configuration and adaptation of data processing pipelines for Big Data analysis infrastructures [6]. We can show that configuring a typed graph representing the data flow and various types of data processing elements can be modeled, configured and instantiated. The result of the instantiation is in particular Java code realizing an adaptive processing pipeline on top of Apache Storm, a recent framework for real-time data stream processing. Furthermore, we can define consistency constraints for pipelines, such as that the data flow through the processing components, which are described in terms of their input/output tuples, must be (structurally) valid. Although it is possible to configure such a pipeline in our general-purpose toolset EASy-Producer, more domain-specific and convenient tool support is desirable.

As a prototype of such a domain-specific configuration support, we designed and realized the QualiMaster Infrastructure Configuration (QM-IConf) tool, a domain-specific configuration frontend, which is implemented on top of our general-purpose toolset EASy-Producer. The figure below depicts the graphical pipeline editor of QM-IConf, which allows the user to define data processing pipelines in a drag-and-drop manner. Further configuration options such as the compute resource pool or the data analysis algorithms are available through the tree shown on the left side of the figure.


Moreover, the QM-IConf tool allows to validate the actual configuration, shows configuration errors, allows to instantiate a configuration into source code artifacts and, in general, shields the user from the generic configuration capabilities of the underlying EASy-Producer toolset.

For more insights into our approach to topological configuration, please refer to the QM-IConf demonstration video (on the QualiMaster homepage or on YouTube). Further, we assembled a demo version of QM-IConf. As a simplification, we included a recent version of the Configuration (Meta) Model so that no dedicated login is required (as shown in the video).

  • Windows 64bit Java (download URL, version 0.10.5, July 2016)
  • Linux (gtk/x86) 64bit Java (download URL, version 0.10.5, July 2016, requires 64bit Linux)
  • Nightly integration builds (URL)

Please consider the specific installation information in the contained readme file. In case of technical problems please feel free to contact Cui Qin (qin(at)

Since December 2015, QM-IConf is Open Source in the QualiMaster GitHub space.


Dr. Holger Eichelberger, eichelberger(at)


[1] T. Berger, S. Stanciulescu, O. Øgård, Ø. Haugen, B. Larsen, A. Wasowski. To connect or not to connect: experiences from modeling topological variability. Software Product Line Conference (SPLC '14),  330–339. ACM, 2014.

[2] K. Czarnecki, S. Helsen, U. Eisenecker. Staged configuration through specialization and multi-level configuration of feature models. J. SPIRE, 10(2):143–169, 2005.

[3] INDENICA Consortium, Open Variability Modelling Approach for Service Ecosystems, Deliverable D2.1, 2012

[4] H. Eichelberger, K. Schmid: IVML - A DSL for Configuration in Variability-Rich Software Ecosystems, Proceedings of the 19th International Software Product Line Conference, Volume 2, 2015

[5] H. Eichelberger, S. El-Sharkawy, C. Kröher, K. Schmid, EASy-Producer: Product Line Development for Variant-rich Ecosystems, Proceedings of the 18th International Software Product Line Conference, Volume 2, Seite 133-137, 2014

[6] QualiMaster Consortium, Quality-aware Processing Pipeline Modeling, Deliverable D4.1, 2014

The research leading to these results has received funding from the European Union Seventh Framework Programme [FP7/2007-2013] under grant agreements n° 619525 and n° 257483.


Prof. Dr. Klaus Schmid
Institut für Informatik
AG Software Systems Engineering
Universitätsplatz 1
31141 Hildesheim

Institut für Informatik
Samelsonplatz 1
31141 Hildesheim

Sekretariat: Raum C212 Spl
Telefon +49 5121 883-40330

Institut für Informatik

Stiftung Universität Hildesheim
Institut für Informatik
Samelsonplatz 1
31141 Hildesheim

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